Datasheet Summary
ABRIDGED DATA SHEET
Rev 0; 3/09
KIT ATION EVALU E L B A AVAIL
Zatara High-Performance, Secure, 32-Bit ARM Microcontroller
General Description
- 64KB Embedded Zero-Wait-State SRAM
- Vectored Interrupt Controller
- External Bus Interface Dual External Bus Architecture (Primary and Secondary) 24-Bit Address, 16-Bit Data Synchronous Flash SDRAM in 16MB to 512MB Configurations
- Power Management Unit 14MHz to 40MHz Oscillator and Phase-Locked Loop (PLL)-Generated System Clocks 32.768kHz Oscillator for RTC Clock Disable on a Peripheral-by-Peripheral Basis Three Modes: Active, Idle, and Battery Backup
- Real-Time Clock
- Watchdog Timer (WDT)
- Two Dedicated SPI Interfaces
- USB 2.0 OTG...